A/D Global Data Register. This register contains the ADC’s DONE bit and the result of the most recent A/D conversion.
| RESERVED | Reserved. Read value is undefined, only zero should be written. |
| RESULT | When DONE is 1, this field contains a binary fraction representing the voltage on the AD0[n] pin selected by the SEL field, as it falls within the range of VREFP to VSS. Zero in the field indicates that the voltage on the input pin was less than, equal to, or close to that on VSS, while 0xFFF indicates that the voltage on the input was close to, equal to, or greater than that on VREFP. |
| RESERVED | Reserved. Read value is undefined, only zero should be written. |
| CHN | These bits contain the channel from which the RESULT bits were converted (e.g. 000 identifies channel 0, 001 channel 1…). |
| RESERVED | Reserved. Read value is undefined, only zero should be written. |
| OVERRUN | This bit is 1 in burst mode if the results of one or more conversions was (were) lost and overwritten before the conversion that produced the result in the RESULT bits. This bit is cleared by reading this register. |
| DONE | This bit is set to 1 when an A/D conversion completes. It is cleared when this register is read and when the ADCR is written. If the ADCR is written while a conversion is still in progress, this bit is set and a new conversion is started. |